{"id":77379,"date":"2026-02-18T17:51:50","date_gmt":"2026-02-18T14:21:50","guid":{"rendered":"https:\/\/afaghhosting.net\/blog\/cve-2026-23213-drm-amd-pm-disable-mmio-access-during-smu-mode-1-reset\/"},"modified":"2026-02-18T17:51:50","modified_gmt":"2026-02-18T14:21:50","slug":"cve-2026-23213-drm-amd-pm-disable-mmio-access-during-smu-mode-1-reset","status":"publish","type":"post","link":"https:\/\/afaghhosting.net\/blog\/cve-2026-23213-drm-amd-pm-disable-mmio-access-during-smu-mode-1-reset\/","title":{"rendered":"CVE-2026-23213 &#8211; drm\/amd\/pm: Disable MMIO access during SMU Mode 1 reset"},"content":{"rendered":"<p>CVE ID : CVE-2026-23213<\/p>\n<p>Published :  Feb. 18, 2026, 2:21 p.m. | 38\u00a0minutes ago<\/p>\n<p>Description : In the Linux kernel, the following vulnerability has been resolved:<\/p>\n<p>drm\/amd\/pm: Disable MMIO access during SMU Mode 1 reset<\/p>\n<p>During Mode 1 reset, the ASIC undergoes a reset cycle and becomes<br \/>\ntemporarily inaccessible via PCIe. Any attempt to access MMIO registers<br \/>\nduring this window (e.g., from interrupt handlers or other driver threads)<br \/>\ncan result in uncompleted PCIe transactions, leading to NMI panics or<br \/>\nsystem hangs.<\/p>\n<p>To prevent this, set the `no_hw_access` flag to true immediately after<br \/>\ntriggering the reset. This signals other driver components to skip<br \/>\nregister accesses while the device is offline.<\/p>\n<p>A memory barrier `smp_mb()` is added to ensure the flag update is<br \/>\nglobally visible to all cores before the driver enters the sleep\/wait<br \/>\nstate.<\/p>\n<p>(cherry picked from commit 7edb503fe4b6d67f47d8bb0dfafb8e699bb0f8a4)<\/p>\n<p>Severity: 0.0 | NA<\/p>\n<p>Visit the link for more details, such as CVSS details, affected products, timeline, and more&#8230;\u00a0<\/p>\n","protected":false},"excerpt":{"rendered":"<p>CVE ID : CVE-2026-23213 Published : Feb. 18, 2026, 2:21 p.m. | 38\u00a0minutes ago Description : In the Linux kernel, the following vulnerability has been resolved: drm\/amd\/pm: Disable MMIO access during SMU Mode 1 reset During Mode 1 reset, the ASIC undergoes a reset cycle and becomes temporarily inaccessible via PCIe. Any attempt to access &hellip;<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[26],"tags":[],"class_list":["post-77379","post","type-post","status-publish","format-standard","hentry","category-vulnerability"],"_links":{"self":[{"href":"https:\/\/afaghhosting.net\/blog\/wp-json\/wp\/v2\/posts\/77379","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/afaghhosting.net\/blog\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/afaghhosting.net\/blog\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/afaghhosting.net\/blog\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/afaghhosting.net\/blog\/wp-json\/wp\/v2\/comments?post=77379"}],"version-history":[{"count":0,"href":"https:\/\/afaghhosting.net\/blog\/wp-json\/wp\/v2\/posts\/77379\/revisions"}],"wp:attachment":[{"href":"https:\/\/afaghhosting.net\/blog\/wp-json\/wp\/v2\/media?parent=77379"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/afaghhosting.net\/blog\/wp-json\/wp\/v2\/categories?post=77379"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/afaghhosting.net\/blog\/wp-json\/wp\/v2\/tags?post=77379"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}